Why memory hierarchy is needed

So the memory organization of the system can be done by memory hierarchy. It has several levels of memory with different performance rates. But all these can supply an exact purpose, such that the access time can be reduced. The memory hierarchy was developed depending upon the behavior of the program. This article discusses an overview of the memory hierarchy in computer architecture. The memory in a computer can be divided into five hierarchies based on the speed as well as use. The processor can move from one level to another based on its requirements.

The five hierarchies in the memory are registers, cache, main memory, magnetic discs, and magnetic tapes. The first three hierarchies are volatile memories which mean when there is no power, and then automatically they lose their stored data. Whereas the last two hierarchies are not volatile which means they store the data permanently. A memory element is the set of storage devices which stores the binary data in the type of bits. In general, the storage of memory can be classified into two categories such as volatile as well as non- volatile.

The memory hierarchy design in a computer system mainly includes different storage devices. Most of the computers were inbuilt with extra storage to run more powerfully beyond the main memory capacity. The following memory hierarchy diagram is a hierarchical pyramid for computer memory. The designing of the memory hierarchy is divided into two types such as primary Internal memory and secondary External memory.

The primary memory is also known as internal memory, and this is accessible by the processor straightly. This memory includes main, cache, as well as CPU registers. This memory includes an optical disk, magnetic disk, and magnetic tape.

Previously, the designing of a computer system was done without memory hierarchy, and the speed gap among the main memory as well as the CPU registers enhances because of the huge disparity in access time, which will cause the lower performance of the system.

So, the enhancement was mandatory. The ability of the memory hierarchy is the total amount of data the memory can store. Because whenever we shift from top to bottom inside the memory hierarchy, then the capacity will increase. The access time in the memory hierarchy is the interval of the time among the data availability as well as request to read or write.

Because whenever we shift from top to bottom inside the memory hierarchy, then the access time will increase. When we shift from bottom to top inside the memory hierarchy, then the cost for each bit will increase which means an internal Memory is expensive compared with external memory. Usually, the register is a static RAM or SRAM in the processor of the computer which is used for holding the data word which is typically 64 or bits.

The program counter register is the most important as well as found in all the processors. Since it is implemented using CMOS process, it requires low power to retain the bit.

The four address bits are given to the address decoder which selects one of the 16 words. All bits of that word are selected. Write Enable signal is used to enable the write operation. The Data input lines are used to write fresh data into the selected word and the Data output lines are used to read data from the selected word.

However, this is a destructive read out. It needs to be periodically refreshed, say every 8 ms. For a write operation, we have to drive the bit line and select the row. For a read operation, we have to precharge the bit line to Vdd and select the row. The cell and bit line share charges and there is very small voltage change on the bit line. Once the read is performed, a write is to be done to restore the value.

Refresh is just a dummy read to every cell. The advantage of DRAM is its structural simplicity: only one transistor and a capacitor are required per bit, compared to four or six transistors in SRAM. This allows DRAM to reach very high densities. The transistors and capacitors used are extremely small; billions can fit on a single memory chip. Due to the dynamic nature of its memory cells, DRAM consumes relatively large amounts of power, with different ways for managing the power consumption.

The cells are arranged as a two dimensional array. The address lines are divided into two parts — one part used for the row decoder and the other part for the column decoder. Only the cell that is selected by the row and column decoder can be read or written. As always, though the Data input and Data output lines are not shown, they are used for the Write and Read operations, respectively. In order to conserve the number of address lines, the address lines can be multiplexed.

The upper half of address can be transmitted first and then the lower half of the address. Memory Optimizations: We know that even though faster memory technologies have been brought in, the speed of memory is still not comparable to the processor speeds.

This is a major bottleneck. Memory capacity and speed should grow linearly with processor speed. However, unfortunately, memory capacity and speed has not kept pace with processors. Therefore, we can think of some optimizations to improve memory accesses. The optimizations that are normally carried out are:. This enables the memory controller to know the exact clock cycle when the requested data will be ready.

Therefore, the CPU no longer has to wait between memory accesses. SDRAM chips also take advantage of interleaving and burst mode functions, which make memory retrieval even faster. Power consumed can be reduced in SDRAMs by lowering the voltage and using the low power mode which ignores the clock and continues to refresh.

Rambus is designed to fit into existing motherboard standards. The components that are inserted into motherboard connections are called Rambus in-line memory modules RIMMs. They replace conventional DIMMs. Many computer companies make high-end microcomputers with both memory systems and let the consumer make their choice.

Read Only Memory ROM is a type of non-volatile memory used in computers and other electronic devices. Data stored in ROM can only be modified slowly, with difficulty, or not at all, so it is mainly used to store firmware, as BIOS of desktop computers and in embedded devices also serves as a code protection device.

We have ROMs that are read-only in normal operation, but can still be reprogrammed in some way. Erasable programmable read-only memory EPROM and electrically erasable programmable read-only memory EEPROM can be erased and re-programmed, but usually this can only be done at relatively slow speeds, may require special equipment to achieve, and is typically only possible a certain number of times.

Flash memory is an electronic non-volatile computer storage medium that can be electrically erased and reprogrammed. It must be erased in blocks before being overwritten. It has limited number of write cycles. It is slower than SRAM, and faster than disk. It is extensively used in PDAs, digital audio players, digital cameras, mobile phones, etc.

Its mechanical shock resistance is the reason for its popularity over hard disks in portable devices, as also its high durability, being able to withstand high pressure, temperature, immersion in water, etc. Memory hierarchy terminology: Let us now look at the terminology that is used with a hierarchical memory system. A Hit is said to occur if data appears in some block in the upper level. A Miss is said to occur if data needs to be retrieved from a block in the lower level. When a word is not found in the cache, a miss occurs:.

The access time is the time between read request and when desired word arrives. The Cycle time is the minimum time between unrelated requests to memory.